In the design of integrated circuits, it is known that designers typically utilize one or more libraries of functional blocks, commonly known as “cells,” to design circuits to be formed with semiconductor devices as part of one or more such integrated circuits. These libraries of cells are available to the designer via a computer system, commonly known as a “computer aided design” (CAD) system, and allow the designer to design circuits on a computer display screen simply by selecting particular cells from the libraries and placing them in a visual schematic representation of the proposed circuit on the display screen.
These cells are typically standardized in that they have known electrical characteristics such as, for example, propagation delay, capacitance and inductance. Moreover, the cells are a pre-characterized collection of circuit elements (e.g., logic gates such as NAND, NOR, inverters, etc.). This allows the designer to design, with a reasonable degree of confidence, an integrated circuit that performs certain desired functions within specific operational constraints. Such standard cell design is thus able to achieve very high gate density while also achieving desired electrical performance.
As is also known, noise in a given circuit is considered to be an unwanted variation in voltage or current at some evaluation node of the given circuit. In the case of a standard cell design, the evaluation node may be an output of a standard cell. In a digital design, for example, noise can typically affect a static signal in one of four ways: (1) noise above a logic level zero (0) signal is commonly known as “rise noise;” (2) noise below a logic level 0 signal is commonly known as “undershoot noise;” (3) noise above a logic level one (1) signal is commonly known as “overshoot noise;” and (4) noise below a logic level 1 signal is commonly known as “fall noise.”
Noise in circuits can come from various sources, for example, charge sharing, supply, leakage noise, crosstalk and propagated noise. With technology scaling, particularly at the deep sub-micron level, noise in circuits is becoming more significant due to factors such as lower supply voltage, higher interconnect densities, faster clock rates, more aggressive use of high-performance circuit families, and scaling of threshold voltages.
Thus, characterization of noise is very important during the early design cycle in order to ensure correct placement of circuit elements and signal routing prior to fabrication of an actual integrated circuit.